Engineer, Researcher, Builder
I build things that bridge the gap between transistors and cloud services. Here's the story behind the code.
Bridging Hardware & Software
I'm a researcher and engineer who thrives at the intersection of hardware and software. My journey began with digital circuit design and FPGA architectures, evolved through a Ph.D. in reconfigurable computing, and now spans full-stack systems — from RTL to React.
At Intel, I lead teams designing next-generation FPGA accelerators for data center workloads. Outside work, I write about algorithms, distributed systems, and hardware-software co-design on this site. I believe the best engineers are the ones who can reason across abstraction layers — and I try to live by that principle every day.
When I'm not deep in code or silicon, you'll find me mentoring early-career engineers, tinkering with Rust side projects, or experimenting with new ways to make technical content more accessible.
Where I've Worked
A decade of building at the intersection of hardware and software.
Intel Corporation
Santa Clara, CASenior Staff Engineer
- Leading architecture and design of next-generation FPGA accelerators for data center workloads.
- Driving cross-functional collaboration between hardware and software teams to optimize system-level performance.
- Mentoring a team of engineers on RTL design best practices and verification methodologies.
Staff Engineer
- Designed high-performance interconnect fabric for multi-chip FPGA modules.
- Developed automated verification frameworks reducing regression cycle time by 40%.
- Published 3 internal technical papers on hardware-software co-design patterns.
Qualcomm
San Diego, CASenior Engineer
- Implemented DSP algorithms for 5G modem signal processing pipeline.
- Optimized power consumption in SoC designs achieving 15% improvement.
- Collaborated with systems team on architecture specifications for next-gen chipsets.
University Research Lab
Atlanta, GAResearch Assistant
- Conducted research on reconfigurable computing architectures for machine learning acceleration.
- Published 5 peer-reviewed papers in top-tier conferences (FPGA, DAC, ICCAD).
- Developed open-source FPGA toolchain extensions used by 200+ researchers.
Academic Background
From fundamentals to frontier research.
Georgia Institute of Technology
Atlanta, GAPh.D. in Electrical & Computer Engineering
Dissertation: "Reconfigurable Architectures for Accelerating Machine Learning Workloads"
- Focus areas: Computer Architecture, FPGA Design, Machine Learning Hardware.
- Recipient of the ECE Outstanding Research Award.
Indian Institute of Technology (IIT)
IndiaM.Tech in VLSI Design
- Graduated with distinction. Thesis on low-power SRAM design.
- Teaching assistant for Digital VLSI Design and Computer Organization.
Jadavpur University
Kolkata, IndiaB.E. in Electronics & Telecommunication Engineering
- First class with honors. University gold medalist.
- Led the university robotics club and won national-level competitions.
Professional Credentials
Industry-recognized certifications.
Amazon Web Services
AWS Solutions Architect – Professional
Cloud Native Computing Foundation
Certified Kubernetes Application Developer (CKAD)
What I Work With
A curated set of tools, languages, and domains I use to build across the stack.
Languages
Frameworks & Libraries
Infrastructure & Tools
Hardware & EDA
Domains
Want the full picture?
Download my resume for a comprehensive overview of my experience, publications, and skills.